The present invention relates to a semiconductor device for testing an analog to digital (A/D) conversion circuit.
In recent years, a semiconductor device called a system-on-a-chip has increasingly become the mainstream. In this type of device, an A/D conversion circuit, a digital circuit for performing processing based on the A/D conversion results and the like, for example, are placed on one chip. Some of such semiconductor devices include a mode switch circuit therein for enabling testing of only the A/D conversion circuit, among circuits in the device, so that the A/D conversion results can be directly outputted outside.
However, if the influence of noise caused by electromagnetic waves originating from a testing device (LSI tester), a substrate for testing and surrounding facilities becomes great during the testing, the A/D conversion accuracy may degrade, resulting in failure to perform appropriate testing. Moreover, recently, in response to requests for higher-performance A/D conversion circuits, a larger number of bits have been used in the A/D conversion circuits, and thus the voltage resolution required during testing has been increasingly enhanced giving smaller voltages. For this reason, noise of minute voltages that would have conventionally caused no problem has become a major cause for reducing the A/D conversion accuracy.
To address the above problem, the following technology has been proposed. That is, a data storage means is provided for storing the latest m values (m is an integer equal to or more than 3) outputted from an A/D conversion circuit. Every time a value stored in the data storage means is updated, the values in the data storage means are sorted in descending order to detect a value in a specific ordinal rank or subjected to smoothing processing for smoothing a variation, to thereby remove noise (see Japanese Laid-Open Patent Publication No. 2005-167972).
However, the noise removal technology described above has the following problems. The data storage means for storing all of the latest m values temporarily is required, and moreover processing must be made every time a value in the data storage means is updated. In particular, as the number of values stored in the data storage means is greater, the circuit scale is greater and the circuit operation speed must be higher.